VHDL sourcecode and MATLAB support files for logic design and test in Xilinx tools and/or MATLAB
- Edit and design logic in Xilinx Vivado/ISE
- Edit and design signal processing in MATLAB (if available)
- Comprehensive hardware support and tools for signal processing
- Hardware inteface layer design structure allows rapid integration of application-specific code
- Designed to support real-time signal processing and data acquisition
- Reference designs illustrating hardware use
The FrameWork Logic tools provide comprehensive support for FPGA signal processing development in MATLAB and RTL for Innovative Integration products. The logic development cycle is shortened by building application logic within the FrameWork Logic hardware layer using pre-written and verified IP cores. The MATLAB tools provide a powerful graphical block diagram environment for the rapid design of custom IP cores. The RTL tools complement the MATLAB environment and provide the flexibility of a high-level language. The tested high level signal processing can be seamlessly integrated with VHDL in the same project, allowing you to work with the tools best suited for the job.
Check out FrameWork tools in action with the Custom DSP Algorithm on a Xilinx FPGA Video Tutorial.
To develop FPGA firmware, the Innovative Framework Logic package for the specific board-level product is required. The Framework Logic package contains annotated VHDL source code for the stock firmware. These VHDL components are packaged so that they may optionally be used within the Mathworks Simulink environment, allowing bit-true, cycle-true simulation in the custom design. VHDL is the preferred environment when developing basic logic functionality, but the Mathworks tools are preferred for sophisticated digital signal processing firmware development.
In addition to the II Framework Logic package, you will also need the following third-party tools:
For VHDL development
- Xilinx Design Tools
- Vivado for Kintex7 and later
- ISE foundation with ISE Simulator for Virtex6 and earlier
- ChipScope Pro
- System Generator for DSP (see note 1, below)
- Mentor Graphics Design Tools
- ModelSim PE or SE Simulator
For Matlab/Simulink hardware co-simulation
- Mathworks Design Tools (Note 1)
- Matlab – Following toolbox is required
- Filter Design Toolbox
- Signal Processing Toolbox
- Communications Toolbox (see note 2, below)
- Simulink – Following Toolbox is required
- Signal Processing Blockset
- Communications Blockset (see note 2, below)
Note 1: This Toolset is required only to develop custom DSP logic with II BSP
Note 2: Extra toolbox selection from Mathworks depends upon specific customer needs. Please contact Mathworks about your specific algorithm development needs and select appropriate Toolbox.
When purchasing any of the above toolsets from Xilinx or Mathworks, they will ship only the latest version, but provide the option to download earlier versions if required.
The specific versions of the toolsets currently supported for each product are documented here.
Products using the Spartan 3 may use the free ISE WebPACK and ModelSim tools, available on the Xilinx website. Virtex 5 or 6 FPGA-based cards require the purchase of an ISE version better than ISE WebPACK; ie. Logic Edition orbetter.
Please refer to this document for differences between ISE editions.
The decision to purchase node-locked or floating licenses is dependent on your requirements. If you need several seats that will not run concurrently, the floating license is preferred. If you have just a couple of seats, the node-locked is a better, simpler approach.
The part number is EF-ISE-LOG-NL for ISE Logic Edition node-locked, and the one we’d recommend for initial development.