X3-25M

Features

• Two 105 MSPS, 16-bit A/D channels
• Two 50 MSPS, 16-bit DAC channels
• +/-2V, +/-1V, +/-0.2V input ranges
• +/-2V output range
• 16-bits front panel DIO (8 differential pairs)
• Xilinx Spartan 3A,DSP 1.8M gate FPGA
• 4MB SRAM
• Programmable PLL timebase
• Framed, software or external triggering
• Log acquisition timing and events
• 44 bits digital IO on J16
• Power Management features
• XMC Module (75x150 mm)
• PCI Express (VITA 42.3)

Applications

• Wireless Receiver and Transmitter
• Stimulus-response measurements
• Electronic Counter Measures (ECM)
• High speed servo controls
• Arbitrary Waveform Generation
• Spectral Analysis
• RADAR

Overview

The X3-25M is an XMC IO module featuring two 16-bit, 105 MSPS A/D channels and two 16-bit, 50 MSPS DAC channels designed for high speed stimulus-response, ultrasound, and servo control applications.

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Spartan 3A DSP, 1.8M gate FPGA device. Two 1Mx16 memory devices are used for data buffering and FPGA computing memory.

The logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

The PCI Express interface supports continuous data rates up to 180 MB/ s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.