X5-400M

PCIe XMC Module - Two 400 MSPS, 14-bit TI ADS5474 ADCs and Two 500 MSPS, 16-bit DACs, Virtex5 FPGA and 512 MB Memory   

X5-400M XMCe Module - 2 400MSPS ADCs, 2 500MSPS DACs and Virtex5 FPGA

Download Datasheet

Block Diagram

Malibu Libraries

Manufacturers Site

Manufacturers Full Catalogue

Framework Logic

FAQ's

RoHS Compliant C++ drivers available Works with Windows Ships with Malibu libraries Simulink/MATLAB Support Framework logic support Works with Linux

Adapters

eInstrument - DAQ Node

XMC to Cabled PCI Express Adapter

XMC to PCI Adapter Board

XMC to PCI Express Adapter Board

XMC to PCI Express Adapter Board (8-lane)

XMC to CompactPCI Adapter

SBC COMex Embedded PC

Features

  • Two 400 MSPS, 14-bit ADS5474 A/D channels
  • Two 500 MSPS, 16-bit DAC channels
  • +/-1V, 50 ohm, SMA inputs and outputs
  • Xilinx Virtex5, SX95T FPGA
  • 512 MB DDR2 DRAM
  • 4 MB QDR-II SRAM
  • 8 Rocket IO private links, 2.5 Gbps each
  • >1 GB/s, 8-lane PCI Express Host Interface
  • Power Management features
  • XMC Module (75x150 mm)
  • PCI Express (VITA 42.3)

Applications

  • Wireless Receiver and Transmitter
  • WLAN, WCDMA, WiMAX front end
  • RADAR
  • Electronic Counter Measures (ECM)
  • Electronic Warfare
  • High Speed Data Recording and Playback
  • High speed servo controls
  • Spectral Analysis
  • IP development

Overview

The X5-400M is an XMC IO module featuring two 14-bit, 400 MSPS A/D and two 16-bit, 500 MSPS DAC channels with a Virtex5 FPGA computing core and PCI Express host interface on a standard XMC module.

A Xilinx Virtex5 SX95T FPGA with 512 MB DDR2 DRAM and 4MB QDR-II memory provide a very high performance DSP core for demanding applications such as emerging wireless standards. The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates exceeding 300 GMACs per second.

The X5 XMC modules couple Innovative's powerful Velocia architecture with a high performance, 8-lane PCI Express interface that provides over 1 GB/s sustained transfer rates to the host. Private links to host cards with > 1.6 GB/s capacity using J16 are provided for system integration. The X5 family can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

Software tools for host development include C++ libraries and drivers for Windows and Linux. Application examples demonstrating the module features and use are provided.