X5-RX

PCI Express XMC Module with Four 200 MSPS 16-bit A/Ds, Virtex5 FPGA, 512MB DRAM/ 4MB SRAM 

X5-RX XMCe Module - 4 200MSPS ADCs and Virtex5 FPGA

Download Datasheet

Block Diagram

Malibu Libraries

Manufacturers Site

Manufacturers Full Catalogue

Framework Logic

FAQ's

RoHS Compliant C++ drivers available Works with Windows Ships with Malibu libraries Simulink/MATLAB Support Framework logic support Works with Linux

Adapters

eInstrument - DAQ Node

XMC to Cabled PCI Express Adapter

XMC to PCI Adapter Board

XMC to PCI Express Adapter Board

XMC to PCI Express Adapter Board (8-lane)

XMC to CompactPCI Adapter

SBC COMex Embedded PC

Features

  • Four 200 MSPS 16-bit A/D channels
  • +/-1V, DC-Coupled, 50 ohm, MMCX inputs
  • Texas Instruments ADS5485
  • Xilinx Virtex5, SX95T
  • 512MByte DDR2 DRAM
  • 4MByte QDR-II SRAM
  • 8 RocketIO private links, 2.5 Gbps each
  • >1 GB/s, 8-lane PCI Express Host Interface
  • Power Management features
  • XMC Module (75x150 mm)
  • PCI Express (VITA 42.3)

Applications

  • Wireless Receiver
  • WLAN, WCDMA, WiMAX Front End
  • RADAR
  • Medical Imaging
  • High Speed Data Recording
  • IP Development

Overview

The X5-RX is a high performance digitizing and signal processing module for wireless, RADAR and medical imaging applications. The FPGA computing core supports real-time, 200 MHz signal acquisition and processing for channelization, down-conversion and spectral analysis. For digitizing, the module features four simultaneously sampling 16-bit, 200 MSPS A/Ds.

A Xilinx Virtex5 SX95T with 512MB DDR2 DRAM and 4MB QDR-II memory provide a very high performance DSP core that is tightly integrated with the I/O and PCI Express interface. The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates exceeding 300 GMACs per second.

The X5 XMC modules couple Innovative's powerful Velocia architecture with a high performance, 8-lane PCI Express interface that provides over 1 GB/s sustained transfer rates to the host. Private links to host cards with > 1.6 GB/s capacity using P16 are provided for system integration.

The X5 family logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

IP libraries for the FPGA are also available for down-conversion and channelization of up to 4096 simultaneous channels, baseband demodulation for PSK, FSK and MSK, and spectral analysis. MATLAB simulation models are provided that support logic integration in to the X5-RX Framework Logic.

Software tools for host development include C++ libraries and drivers for Windows and Linux. Application examples demonstrating the module features and use are provided.