X6-1000M FAST ADC & DAC FPGA BOARD

Features

• Two 1 GSPS, 12-bit ADC channels
• Two 1 GSPS, 16-bit DAC channels
• +/-1V, AC or DC -Coupled, 50 ohm, SMA inputs and outputs
• Xilinx Virtex-6 SX315T/SX475T or LX240T
• Texas Instruments ADS5400
• 4 Banks of 1GB DRAM (4 GB total)
• Ultra-low jitter programmable clock
• Arbitrary Waveform Generation Memory
• Controller for DACs
• Gen2 x8 PCI Express providing 2 GB/s sustained transfer rates
• PCI 32-bit, 66 MHz with P4 to Host card
• PMC/XMC Module (75x150 mm)
• 20-25W typical
• Conduction Cooling per VITA 20 Ruggedization Levels for Wide Temperature Operation
• Adapters for VPX, Compact PCI, desktop PCI and cabled PCI Express systems

Applications

• Wireless Receiver and Transmitter
• LTE, WiMAX Physical Layer
• RADAR
• Medical Imaging
• High Speed Data Recording and Playback
• IP development

Overview

The X6-1000M integrates high-speed digitizing and signal generation with signal processing on a PMC/XMC IO board module for demanding DSP applications. The tight coupling of the digitizing to the Virtex6 FPGA core realizes architectures for SDR, RADAR, and LIDAR front end sensor digitizing and processing. The PCI Express system interface sustains transfer rates over 2 GB/s for data recording and integration as part of a high performance realtime system.

The X6-1000M features two, 12-bit 1 GSPS ADCs and two 1 GSPS 16-bit DACs. Analog input bandwidth of over 2 GHz supports wideband applications and undersampling. The DACs have features for interpolation and coarse mixing for upconversion. The sample clock is from either a low-jitter PLL or external input. Multiple cards can be synchronized for sampling and down-conversion.

A Xilinx Virtex6 SX315T (LX240T and SX475T options) with 4 banks of 1GB DRAM provide a very high performance DSP core with over 2000 MACs (SX315T). The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates. The X6-1000M power consumption is 20W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation from -40 to +85C operation and 0.1 g2/Hz vibration. Conformal coating is available.

The FPGA logic can be fully customized using VHDL and MATLAB using the Frame Work Logic tool set. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator. IP cores for many wireless, DSP and RADAR functions such as large-scale preintegrator, DDC, PSK/FSK demod, OFDM receiver, correlators and large FFT are available. Software tools for host development include C++ libraries and drivers for Windows, Linux and VxWorks. Application examples demonstrating the module features are provided.

Further information on Xilinx Virtex 6 FPGA's.