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Malibu Libraries
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Framework Logic
IP Cores
FAQ's

Adapters
eInstrument
- DAQ Node
XMC to Cabled PCI Express Adapter
XMC to PCI Adapter Board
XMC to PCI Express Adapter Board
XMC to PCI Express Adapter Board
(8-lane)
XMC to CompactPCI Adapter
SBC COMex Embedded PC |
| Chipset |
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| Analogue to Digital |
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ADC16DV160 |
| FPGA |
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Xilinx Virtex6, XC6VLX240T or XC6VSX315T or XC6VSX475T |
| Digital to Analogue |
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n/a |
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Features
- Four 160 MSPS 16-bit A/D channels
- Two Down-Converter ASICs supporting up 48 Narrowband
or 8 Wideband Channels
- +/-1V, DC-Coupled, 50 ohm, MMCX inputs
- Xilinx Virtex6 SX315T/SX475T or LX240T
- 4 Banks of 1GB DRAM
- Ultra-low jitter programmable clock
- x8 PCI Express providing 1 GB/s sustained transfer
rates
- PCI 32-bit, 66 MHz with P4 to Host card
- PMC/XMC Module (75x150 mm)
- < 15W typical
- Conduction Cooling per VITA 20
- Ruggedization Levels for Wide Temperature Operation
- Adapters for VPX, Compact PCI, desktop PCI and
cabled PCI Express systems
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Applications
- Wireless Receiver
- WLAN, WCDMA, WiMAX Front End
- RADAR
- Medical Imaging
- High Speed Data Recording
- IP Development
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Overview
The X6-RX is a flexible IF receiver that integrates IF digitizing with
signal processing on a PMC IO module. The module provides up to 48
configurable receiver channels with a powerful Xilinx Virtex 6 FPGA signal
processing core, and high performance PCI Express/PCI host interface. With
the X6-RX, IF recorders can log both the digitized raw data and channels
real-time sustaining rates over 1 GB/s.
The X6-RX features four, 16-bit 160 MSPS A/Ds with dual digital
downconverters (DDC). IF frequencies of up to 300 MHz are supported. The
sample clock is from either a low-jitter PLL or external input. Multiple
cards can be synchronized for sampling and downconversion.
A Xilinx Virtex6 SX315T (LX240T at initial release) with 4 banks of 128MB
DRAM provide a very high performance DSP core with over 2000 MACs
(SX315T). The close integration of the analog IO, memory and host
interface with the FPGA enables real-time signal processing at extremely
high rates.
Dual TI/GrayChip DDCs, connected directly to the FPGA, provide up to 48
narrowband or 8 wideband channels, with input from any A/D channel. The
DDC perform complex or real downconversion, with flexible controls for
mixing, filtering, decimation, output formats and data rates. Channels can
be synchronized to support beam forming or frequency hopped systems.
The X6 family power is less than 15W for typical operation. VITA 20
conduction cooling is used with a heat-spreader and sink are Ruggedization
levels for wide-temperature operation and conformal coating are supported.
The FPGA logic can be fully customized using VHDL and MATLAB using the
Frame Work Logic toolset. The MATLAB BSP supports real-time
hardware-inthe-loop development using the graphical, block diagram
Simulink environment with Xilinx System Generator. IP cores for DDC,
demodulation, and FFT are available.
Software tools for host development include C++ libraries and drivers for
Windows and Linux. Application examples demonstrating the module features
and use are provided.
This extremely versatile module is easily adapted for use in virtually any
type of system. Our XMC carrier adapters offer conduction and convection
cooling and are available for a range of interfaces including Desktop PCI,
Desktop PCI Express, Cabled PCI Express, CompactPCI, and PXI/PXI Express.
This module is also readily installed into Innovative Integration's
eInstrument Embedded PC, SBC-ComEx Single-Board Computer, and Andale Data
Loggers. |
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