X6-1000M Data Acquisition Board with ADS5400 ADCs, DAC5682Z Dacs and Virtex6 FPGA all on XMC
The X6-1000M Data Acquisition Board integrates high-speed digitizing and signal generation with signal processing on a PMC/XMC IO board module for demanding DSP applications. The tight coupling of the digitizing to the Virtex6 FPGA core realizes architectures for SDR, RADAR, and LIDAR front end sensor digitizing and processing. The PCI Express system interface sustains transfer rates over 2 GB/s for data recording and integration as part of a high performance realtime system.
The X6-1000M features two 12-bit 1000MSPS ADCs, either AC or DC-coupled (specify at time of order). The input voltage range is +/-1V and 50 ohms impedance. The AC coupled variant has an input bandwidth of 5MHz to 750MHz. The DC coupled variant has an input bandwidth of DC to 1000MHz.
The Digital to Analogue output channels are implemented using a pair of TI DAC5682Z which is a dual 500MSPS or single 1GSPS 16 bit device. Therefore the X6-1000M can be used as 4 outputs upto 500MSPS or 2 outputs upto 1GSPS. The DAC includes interpolation modes. The outputs are either AC or DC coupled (specify at time of order). The AC coupled variant bandwidth is 5MHz to 1000MHz. The DC coupled variant bandwidth is DC to 1000MHz.
A Xilinx Virtex6 SX315T (LX240T and SX475T options) with 4 banks of 1GB DRAM provide a very high performance DSP core with over 2000 MACs (SX315T). The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates. The X6-1000M power consumption is 20W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation from -40 to +85C operation and 0.1 g2/Hz vibration. Conformal coating is available.
The FPGA logic can be fully customized using VHDL and MATLAB using the Frame Work Logic tool set. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator. IP cores for many wireless, DSP and RADAR functions such as large-scale preintegrator, DDC, PSK/FSK demod, OFDM receiver, correlators and large FFT are available. Software tools for host development include C++ libraries and drivers for Windows, Linux and VxWorks. Application examples demonstrating the module features are provided.
